This invention relates in general to circuit testing, and in particular to circuit testing systems for locating faulty digital integrated circuits.
Numerous circuit testing systems have been proposed to facilitate streamlined test procedures and reliable identification and location of faulty circuit components. In general, state-of-the-art test procedures prescribe the application of a predetermined test signal to the circuit being tested, then analyzing the response to determine the existence and location of faulty nodes. Once such nodes are identified, the general procedure is to inject an electric current into the node and to check the associated branches to determine which such branch is shorted.
Regarding the analysis of a response to applied test signals, U.S. Pat. No. 4,204,114, issued to Shoemaker et al, discloses a computer based system which acquires a reference signal from a known good circuit. The second test phase is illustrated by U.S. Pat. Nos. 4,074,188 and 4,345,201, issued to Boatman et al and Thompson et al respectively, both of which teach the detection of an injected current by means of an inductive probe with a ferrite core.
Other prior art teachings relevant to the present invention are B. Bronson and A. Chan, "A Multifunction, Multifamily Logic Pulser," Hewlett Packard Journal Volume 28, No. 4, October 1975, pp 12-16; and V. L. Creveling and R. E. Jones, "Signal Monitoring and Control Circuit for Semiconductor Device Test Probe," IBM Technical Disclosure Bulletin Volume 17, No. 11, April 1975, pp 3277-3278. Bronson and Chan teach the use of a voltage comparator feedback loop to control the timing of high and low logic level current pulses. Creveling and Jones suggest the use of a FET switch array to permit selection of different power sources for a given test channel.
A shortcoming of prior art circuit testing systems is their failure to allow precise control over the voltage levels at which current is injected into the circuit being tested while providing frequency discrimination of the injected current.